Conventional disk drives have employed peak detection techniques in order to recover digital data written as saturation recording onto a magnetizable surface media of a rotating disk. With peak detection techniques, it is necessary to space flux transitions sufficiently apart so that analog peaks in the recovered data stream may be identified and the corresponding data recovered. In order to achieve reasonable bandwidths in data channels, it has been customary to employ data coding techniques. One such technique has been to use a (1,7) RLL code. In this code, flux transitions can be no closer together than every other clock bit time period ("bit cell") nor farther apart than eight clock bit cells. (1,7) RLL codes are known as "rate two-thirds" codes, in the sense that two data bits are coded into three code bits. Thus, with a rate two-thirds code, one third of the user storage area of the storage disk is required for code overhead.
One way to decrease the code overhead is to employ a code in which flux transitions are permitted in adjacent bit cells. One such code is a (0,4,4) code. The (0,4,4) code can be implemented as a rate eight-ninths code, meaning that nine code bits are required for eight incoming data bits. (Theoretically, the (0,4,4) code capacity is somewhat higher, approaching 0.961). Thus, this code is significantly more efficient than a rate two-thirds code, such as (1,7) RLL. Use of a (0,4,4) code results in a significantly greater net user data storage capacity on the disk surface, given a constant bit cell rate. However, when flux transitions occur in adjacent bit cells, as is the case with a (0,4,4) code, intersymbol interference ("ISI") results. Conventional peak detection techniques are not effective or reliable in recovering data coded in an eight-ninths code format, such as (0,4,4).
The zero in the (0,4,4) code denotes that flux transitions may occur in directly adjacent bit cells of the coded serial data stream. The first "4" denotes that a span of no more than four zeros occurs between ones in the encoder output. The second "4" signifies that the bit cell stream has been divided into two interleaves: an even interleave, and an odd interleave; and, it denotes that there can be a span of no more than four zeros between ones in the encoder output of either the odd interleave or the even interleave.
It is known that partial response signalling enables improved handling of ISI and allows more efficient use of the bandwidth of a given channel. Since the nature of ISI is known in these systems, it may be taken into account in the decoding/detection process. Partial response transmission of data lends itself to synchronous sampling and provides an elegant compromise between error probability and the available spectrum. The partial response systems described by the polynomials 1+D, 1-D, and 1-D.sup.2 are known as duobinary, dicode and class IV (or "PR4"), respectively, where D represents one bit cell delay and D.sup.2 represents 2 bit cell delays (and further where D=e.sup.-j.omega.T, where .omega. is a frequency variable in radians per second and T is the sampling time interval in seconds). The PR4 magnitude response plotted in FIG. 1 hereof and given the notation .vertline.1-D.sup.2 .vertline. emphasizes midband frequencies and results in a read channel with increased immunity to noise and distortion at both low and high frequencies. In magnetic recording PR4 is a presently preferred partial response system, since there is a close correlation between the idealized PR4 spectrum as graphed in FIG. 1, and the natural characteristics of a magnetic data write/read channel.
In order to detect user data from a stream of coded data, not only must the channel be shaped to a desired partial response characteristic, such as the PR4 characteristic, but also a maximum likelihood ("ML") sequence estimation technique is needed. The maximum likelihood sequence estimation technique determines the data based upon an analysis of a number of consecutive data samples taken from the coded serial data stream, and not just one peak point as was the case with the prior peak detection methods.
One maximum likelihood sequence estimation algorithm is known as the Viterbi detection algorithm, and it is well described in the technical literature. Application of the Viterbi algorithm to PR4 data streams within a magnetic recording channel is known to improve detection of original symbol sequences in the presence of ISI and also to improve signal to noise ratio over comparable peak detection techniques.
In an article entitled "Viterbi Detection of Class IV Partial Response on a Magnetic Recording Channel" appearing in IEEE Trans. on Communications, vol. Com-34, No. 5, May 1986, pp. 434-461, authors Wood and Peterson explain the derivation of PR4 as being formed by subtracting waveforms two bit intervals apart, thereby forming an analog domain ternary "eye" pattern graphed herein in FIG. 2.
The Viterbi algorithm provides an iterative method of determining the "best" route along the branches of a trellis diagram, such as the one shown in FIG. 3 hereof, for example. If, for each trellis branch, a metric is calculated which corresponds to the logarithm of the probability for that branch, then the Viterbi algorithm may be employed to determine the path along the trellis which accumulates the highest log probability, i.e., the "maximum likelihood" sequence. Since the Viterbi algorithm operates upon a sequence of discrete samples {y.sub.k }, the read signal is necessarily filtered, sampled, and equalized.
While PRML has been employed in communications signalling for many years, it has only recently been applied commercially within magnetic hard disk drives. One recent application is described in a paper by Schmerbeck, Richetta, and Smith, entitled "A 27 MHz Mixed Analog/Digital Magnetic Recording Channel DSP Using Partial Response Signalling with Maximum Likelihood Detection", Proc. 1991 IEEE International Solid State Circuits Conference, pp. 136-137, 304, and pp. 96, 97 and 265 Slide Supplement. While the design reported by Schmerbeck et al. appears to have worked satisfactorily, it has drawbacks and limitations which are overcome by the present invention. One drawback of the reported approach was its design for transducers of the ferrite MiG type or of the magnetoresistive type which simplified channel equalization requirements. Another drawback was the use of a single data transfer rate which significantly simplified channel architecture. A further drawback was the use of a dedicated servo surface for head positioning within the disk drive, thereby freeing the PR4, ML data channel from any need for handling of embedded servo information or for rapid resynchronization to the coded data stream following each embedded servo sector.
Prior Viterbi detector architectures and approaches applicable to processing of data sample sequences taken from a communications channel or from a recording device are also described in the Dolivo et al. U.S. Pat. No. 4,644,564. U.S. Pat. No. 4,504,872 to Peterson describes a digital maximum likelihood detector for class IV partial response signalling. An article by Roger W. Wood and David A. Peterson, entitled: "Viterbi Detection of Class IV Partial Response on a Magnetic Recording Channel" IEEE Trans. on Comm. Vol. Com-34, No. 5, May 1986, pp. 454-466 describes application of Viterbi detection techniques to a class IV partial response in a magnetic recording channel. An article by Roger Wood, Steve Ahigrim, Kurt Hallarnasek and Roger Stenerson entitled: "An Experimental Eight-Inch Disc Drive with One-Hundred Megabytes per Surface", IEEE Trans. on Magnetics, Vol. Mag-20, No. 5, September 1984, pp 698-702 describes application of class IV partial response encoding and Viterbi detection techniques as applied within an experimental disk drive. A digital Viterbi detector capable of withstanding lower signal to noise ratios is described in Matsushita et al. U.S. Pat. No. 4,847,871. These documents are representative examples of the known state of the prior art.
In sample based data detection systems, such as PR4,ML, the analog read signal is sampled by an analog to digital converter ("A/D"). The conversion process includes quantization according to the number of bits in the A/D so that, for optimal performance, it is desirable to adjust the amplitude of the analog read signal at the input to the A/D to a level that fully uses the available dynamic range thereof. This is best done with an automatic gain control ("AGC") circuit that senses amplitude as reported by the signal samples since they determine the recovered information content.
One prior approach to gain control within a PR4,ML channel has been proposed by workers at IBM. This prior approach is described in Hirt et al. U.S. Pat. No. 4,750,058 entitled: "Gain Control Circuitry for Readback Apparatus in a PRML Magnetic Recording System." Other facets of this approach are described in an article by Coker et al, entitled "Implementation of PRML in a Rigid Disk Drive", IEEE Trans. on Magnetics, Vol. 27, No. 6, November 1991, pp 4538-4543. This prior approach has several drawbacks. First, an analog loop filter is active during both non-read mode and during read mode when data samples are available. The use of an analog loop filter in the gain loop during read mode makes it somewhat cumbersome to change loop compensation "on the fly". In addition, the analog gain control loop is susceptible to amplitude offset errors. In other words, the DAC control word provides a gain error value that is put into the analog loop filter. If the DAC word that corresponds to zero gain error does not produce exactly zero input to the loop filter, the system is left with an inherent gain offset or bias. A system with a digital loop filter will not exhibit this drawback since the DAC output directly controls the VGA.
In addition, failure of this prior approach to employ update rate scaling techniques required that the gain DAC be capable of operating at the basic data sample clocking rate, thus requiring greater design complexity and power consumption, and leaving the gain loop more susceptible to noise and transients.
Thus, a hitherto unsolved need has arisen for an improved gain control loop for controlling a sampled data detection system, such as a PR4,ML channel within a high performance, very high capacity, low servo overhead disk drive data storage subsystem.